CMOS Sensor Architectures
The CMOS sensor is an array of photodiodes each supplied with sampling and switching circuits. In the simplest sensors, the entire array is reset by reverse biasing all of the photodiodes then disconnecting them from the reset voltage. The voltage across the photodiodes will drop as the exposure to light accumulates so that at some time, the voltages can be samples to produce image data.
In the simplest CMOS sensors, this sampling is accomplished by transferring the voltages from a row of photodiodes selected by a row counter to a bank of capacitors at the bottom of the sensor so that these can be sequentially read out of the device by a column counter. Unlike the readout process in a CCD, CMOS readout does not move the actual charge generated by the incoming light. Only the voltage this charge generates is moved – actually, copied – from the pixel to the readout capacitor to the output. Significantly, this is a non-destructive process. After readout, the voltages are still in the pixel circuits so before the next image can be taken, the photodiodes have to be reset. The methods of reset and readout offer the option of a variety of pixel circuits. All of the configurations described here are of the active pixel sensor (APS) variety. Passive pixel sensor (PPS) configurations are slightly simpler but suffer from numerous performance deficiencies and so are rarely encountered.
CMOS fabrication processes allow a wide variety of sampling and amplification circuits to be incorporated into the pixel area so the actual variety of these circuits is quite broad. The complexity of these circuits is generally limited not by the lack of ideas for functions to be incorporated but by the lack of space to put them. As a result, the design emphasis usually centers on developing ways to maximize function while minimizing the circuitry needed for implementation. Much of the effort in these designs involves optimization of the structures and processes in the silicon itself. Here are some common examples.
The most common pixel structure is the three-transistor (3T) readout.
To initiate an exposure, the reset gate is turned on by a signal applied to the reset line. This connects the diode to the VDD supply to fully reverse bias it. Reset may be applied to all photodiodes simultaneously or, in some sensors, to a row at a time. After reset, the voltage on the diode will slowly fall as the light arrives. The diode voltage is presented to the gate of the follower transistor. When it is time to read out a row, all of the column transfer transistors in that row are simultaneously turned on and the diode voltage is transferred through the column lines to the row of storage capacitors at the bottom of the array. Immediately after this transfer is complete (typically a few microseconds), the diode can be reset and the next exposure cycle can begin.
While this structure is simple, it suffers from two important problems. First, it has a high noise floor because the reset noise from the photodiode is included in the signal sent to the output. Since this noise is never independently measured, it cannot be subtracted as is done with CCDs. Second, since there is only a single row of output capacitors, only one line can be transferred from the array at a time. The next cannot be transferred until the readout is complete. This means that if all of the photodiodes are reset at the same time, the exposure of the photodiodes at the end of the readout will be longer than for the photodiodes at the beginning, producing top-to-bottom shading in the image. Three solutions to terminate the exposure of the whole sensor simultaneously are commonly applied. A mechanical shutter can be closed to allow readout in the dark. Similarly, the imaged area can be kept in the dark except during a short flash of light from an illuminator. If an all-electronic exposure control method that produces equivalent but not simultaneous exposure of the rows is acceptable, each line can be independently reset at a fixed time before readout. This is the “rolling shutter”. For simultaneous electronic exposure, more transistors are required.
Adding a fourth transistor permits separation of the exposure and readout functions thus enabling simultaneous or "global" electronic shuttering. The fourth transistor is usually added between the photodiode and the gate of the buffer transistor.
In operation, the photodiodes are reset together while the transfer transistors are conductive and then at some later time the transfer transistors are closed, fixing the voltage on the gate of the follower. This voltage is then held until the row is transferred. In this way both the start and end of the exposure are electronically controlled.
While the transfer circuit is represented as a transistor switch and a capacitor to hold the voltage, in fact the capacitor is usually another charge storage well on the device and the photodiode is pinned, thus forcing the charge into the storage well as it is created. This arrangement has the advantage that is reduces the reset noise and improves linearity.
It is often suggested that another 4T arrangement might provide for subtraction of reset noise. The proposal is to add a second row transfer transistor to permit transfer of the reset noise to a second row of readout capacitors so that the reset noise can be subtracted from the signal using a differential amplifier at the readout. Unfortunately, this works only if each row is separately exposed because saving the reset noise requires a separate capacitor row for each line in the sensor. Even if this were provided, the rows would need to be transferred one at a time so all rows but the first would have some exposure added to the noise signal. Subtraction of the reset noise has to be done in the pixel and this requires even more transistors.
5T and More
With five transistors, it is possible to configure a pixel circuit that stores the reset noise and the signal both. With six transistors, it is possible to do the actual noise subtraction in the pixel. With six or seven transistors, the dynamic range of the sensor can be increased by multiple sampling. More transistors can be added to allow collection of many images very close together in time. A sensor has been built that has 16 sample nodes per pixel that can be sampled only one microsecond apart, the equivalent of one million frames per second for a short time.
Unfortunately, all of these transistors and the lines to control them take space on the silicon die so adding functions either reduced fill factor or forces an increase in the pitch of the pixels. That is why CMOS sensor with a lot of functions tend towards large pixels. Large pixels drive increases in cost.
2T and Less
One the other end of the scale, where cell phones reside, the push is for tinier pixels to reduce both the cost of the silicon and the thickness of the lens-sensor assemblies while continually increasing resolution. In these sensors, configurations have been developed that allow sharing of some of the transistors between photodiodes. For example, if speed is not an issue, it should be possible to use the same follower and row select transistors for multiple photodiodes. These transistors could be turned off until each of the pixels is to be read out. If, for example, the readout circuit is shared by four photodiodes, the then the result is seven transistors for four photodiodes or 1.75 transistors per pixel. Many arrangements of this type have been designed and implemented for applications where space is at a premium.
Many CMOS sensor engineers have designed other circuit configurations to provide specific advantages in particular performance measures. The active column sensor (ACS) architecture, for instance is intended to improve fixed pattern noise while reducing the space taken by transistors in each pixel. Sensors have been built with JFET switches instead of MOSFET to reduce noise. Photodiodes have been stacked one above the other to provide multiple spectral channels from the same area on the sensor. Pairs of photodiodes in two sizes have been provided to increase dynamic range. Comparators have been put in each pixel for direct digital output. The variety of configurations continues to expand to meet the diverging performance requirements of the many imaging market segments.